The Student's Guide to VHDL

I am an experienced Verilog HDL user and expert logic designer. I just wanted a book that would explain the basic syntax of VHDL. This book did the job. One topic missing that should have been included was "file I/O". For that glaring omission -> 4 stars! If you are looking for a VHDL book that teaches the language and how to apply it to logic synthesis, test benches, or behavorial modeling ... it ain't here ... syntax guide only people!

Don't listen to the other reviews of this book which give it poor ratings. It is an excellent text for it's intended audience, those studying VHDL as part of their course. If you are in this position this book is exceptional value for money. If you are not and want the complete guide to VHDL then you should fork out the extra $'s for The designers guide to VHDL also by the same author which is the authoritive guide on the subject and is also presented in a exceptional manner, not seen in other texts of its nature.

I have found The Student's Guide to VHDL to be extremely helpful in learing VHDL from scratch. The rich amount of examples and highlighting of key words helps newcomers recognize the verbose and strict syntax of VHDL. This book is like a condensed version of the Developer's Guide by Ashenden and is wonderful for getting started in this language. For the price of this book and Ashenden's Developer's guide you can get away with a lot more help and information than single , and more expensive, books from other authors.