Reuse Methodology Manual for System-on-a-Chip Designs
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Book Overview
This updated and revised book outlines a set of best practices for creating reusable designs for use in a SoC design methodology. It provides a chronicle of "best practices". These practices are based... This description may be from another edition of this product.
Format:Hardcover
Language:English
ISBN:0792381750
ISBN13:9780792381754
Release Date:January 1998
Publisher:Kluwer Academic Publishers
Length:240 Pages
Weight:1.20 lbs.
Related Subjects
Architecture CAD Circuits Computer Design Computer Science Computer Technology Computers Computers & Technology Drafting & Presentation Electrical & Electronic Engineering Electrical & Electronics Engineering Engineering & Transportation Graphic Design Microprocessors & System Design PCs Programming Software Design, Testing & Engineering Technology TextbooksCustomer Reviews
3 ratings
Very useful in practice
Published by Thriftbooks.com User , 23 years ago
This book pointed out many design problems that I just met before. Designer could avoid many of them by following the guidelines in this book. I think it would help me a lot in my design work. Thanks to the authors.
Recommend it to every designer as a handbook
Published by Thriftbooks.com User , 23 years ago
The guidelines are not difficult to understand, and you may have the pieces here and there. But this book has a broad coverage. I got this book by luck draw at SNUG. Didn't pay attention at first until I read it. Very well organized, very accurate description of the real feelings of doing a real chip. The methodology it talks about is not limited to "reuse". I suggest the auther change the title for next edition.
Great baseline text for VLSI designers of all stripes
Published by Thriftbooks.com User , 26 years ago
I really liked this book and found its rules and guidelines very useful. Many of the guidelines are common sense, but it is still very appropriate to have them codified in a single textbook. Practitioners of full-custom approaches to IC design will complain that this is an "ASIC" book. It does have some rules that folks from that background will find hard to swallow (eg, no latches, no gated clocks). But 70% of the book is still applicable to full custom design and will result in faster re-use of full custom cores. The book gets off to a fairly wooly start but becomes substantial with the RTL Coding Guidelines chapter. From then on, its really solid stuff. This is a good book for the times. With much discussion of design re-use and transferable intelectual property in the chip industry, it has all the hallmarks of becoming a 'bible' book for IC designers of all stripes.
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