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Paperback Progettazione digitale di SDRAM in Verilog [Italian] Book
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ISBN: 6205313820

ISBN13: 9786205313824

Progettazione digitale di SDRAM in Verilog [Italian]

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Progettare una memoria dinamica ad accesso casuale sincrono (SDRAM) da 8 MB x 16 x 4-BAnk (512 MB) utilizzando il linguaggio di descrizione hardware Verilog, che pu? essere utilizzato in qualsiasi applicazione basata sulla memoria. Oggi i computer, cos? come altri sistemi elettronici che richiedono grandi quantit? di memoria, utilizzano le DRAM come memoria di base . Grazie all'esclusiva struttura a celle di transistor delle DRAM, ? possibile costruire...

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