Modeling of Electrical Overstress in Integrated Circuits

by Sung-Mo Kang, Carlos H. Diaz, Charvaka Duvvury

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Electrical overstress (EOS) and Electrostatic discharge (ESD) pose one of the most dominant threats to integrated circuits (ICs). These reliability concerns are becoming more serious with the downward scaling of device feature sizes. Modeling of Electrical Overstress in Integrated Circuits presents a comprehensive analysis of EOS/ESD-related failures in I/O protection devices in integrated circuits. The design of I/O protection circuits has been done...

Format:Paperback

Language:English

ISBN:1461362059

ISBN13:9781461362050

Release Date:September 2012

Publisher:Springer

Length:148 Pages

Weight:0.57 lbs.

Dimensions:0.4" x 6.1" x 9.2"

Related Subjects

Engineering Technology

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Modeling of Electrical Overstress in Integrated Circuits

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