Low Power Networks-On-Chip
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Book Overview
In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and research communities. This book offers a single-source reference to some of the most important design techniques proposed in the context of low-power design for networks-on-chip architectures.
Format:Paperback
Language:English
ISBN:1489994378
ISBN13:9781489994370
Release Date:November 2014
Publisher:Springer
Length:287 Pages
Weight:0.96 lbs.
Dimensions:0.7" x 6.1" x 9.2"
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