Low-Power Deep Sub-Micron CMOS Logic: Sub-Threshold Current Reduction

by P. van der Meer, Arthur H.M. van Roermund, P.R. van der Meer, et al.

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1. 1 Power-dissipation trends in CMOS circuits Shrinking device geometry, growing chip area and increased data-processing speed performance are technological trends in the integrated circuit industry to enlarge chip functionality. Already in 1965 Gordon Moore predicted that the total number of devices on a chip would double every year until the 1970s and every 24 months in the 1980s. This prediction is widely known as "Moore's Law" and eventually...

Format:Paperback

Language:English

ISBN:1475710577

ISBN13:9781475710571

Release Date:July 2012

Publisher:Springer

Length:154 Pages

Weight:0.55 lbs.

Dimensions:0.4" x 6.1" x 9.2"

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Engineering Technology

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Low-Power Deep Sub-Micron CMOS Logic: Sub-Threshold Current Reduction

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