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Paperback Layout Minimization of CMOS Cells Book
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ISBN: 1461366119

ISBN13: 9781461366119

Layout Minimization of CMOS Cells

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Format: Paperback

Condition: New

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Book Overview

The layout of an integrated circuit (lC) is the process of assigning geometric shape, size and position to the components (transistors and connections) used in its fabrication. Since the number of components in modem ICs is enormous, computer- aided-design (CAD) programs are required to automate the difficult layout process. Prior CAD methods are inexact or limited in scope, and produce layouts whose area, and consequently manufacturing costs, are...

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