Design-For-Test and Test Optimization Techniques for Tsv-Based 3D Stacked ICS

by Krishnendu Chakrabarty and Brandon Noia

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This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify... This description may be from another edition of this product.

Format:Hardcover

Language:English

ISBN:3319023772

ISBN13:9783319023779

Release Date:December 2013

Publisher:Springer

Length:245 Pages

Weight:1.45 lbs.

Dimensions:0.8" x 6.0" x 9.2"

Related Subjects

Computers Computers & Technology Engineering Technology

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Design-For-Test and Test Optimization Techniques for Tsv-Based 3D Stacked ICS

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