- Digital Communication Receivers, Vol. 2: Synchronization, Channel Estimation, and Signal Processing
- Architecture Exploration for Embedded Processors with LISA
- Integrated System-Level Modeling of Network-On-Chip Enabled Multi-Processor Platforms
- Language-driven Exploration and Implementation of Partially Re-configurable ASIPs
- Synchronization in Digital Communication Volume I, Phase-, Frequency-Locked Loops, and Amplitude Control (Wiley Series in Telecommunications and Signal Processing)